# UGC NET Computer Science Solved Paper III December 2014 - Part 1

1.       A hierarchical memory system that uses cache memory has cache access time of 50 nano seconds, main memory access time of 300 nano seconds, 75% of memory requests are for read, hit ratio of 0.8 for read access and the write-through scheme is used. What will be the average access time of the system both for read and write requests ?
(A) 157.5 n.sec.            (B) 110 n.sec.
(C) 75 n.sec.                 (D) 82.5 n.sec.
Explanation:
The average access time of the system for memory read cycle is
0.8x50+0.2x350=110ns
The average access time of the system for both read and writes request is
0.75x110+0.25x300=82.5+75=157.5
2.       For switching from a CPU user mode to the supervisor mode following type of interrupt is most appropriate
(A) Internal interrupts              (B) External interrupts
(C) Software interrupts           (D) None of the above
3.       In a dot matrix printer the time to print a character is 6 m.sec., time to space in between characters is 2 m.sec., and the number of characters in a line are 200. The printing speed of the dot matrix printer in characters per second and the time to print a character line are given by which of the following options ?
(A) 125 chars/second and 0.8 seconds
(B) 250 chars/second and 0.6 seconds
(C) 166 chars/second and 0.8 seconds
(D) 250 chars/second and 0.4 seconds
Explanation:
Time to print a character = 6+2=8 m.sec.
Number of characters in a line = 200
Time to print a character line = 200x8=1600 m.sec. = 1.6 seconds
Printing speed in characters per second = 200/1.6 = 125 chars/second
4.       Match the following 8085 instructions with the flags :
List – I               List – II
a. XCHG            i. only carry flag is affected.
b. SUB               ii. no flags are affected.
c. STC                iii. all flags other than carry flag are affected.
d. DCR              iv. all flags are affected.
Codes :
a    b    c    d
(A) iv    i    iii    ii
(B) iii    ii    i    iv
(C) ii    iii    i    iv
(D) ii    iv    i    iii
5.       How many times will the following loop be executed ?
LXI B, 0007 H
LOP : DCX B
MOV A, B
ORA C
JNZ LOP
(A) 05 (B) 07
(C) 09 (D) 00
6.       Specify the contents of the accumulator and the status of the S, Z and CY flags when 8085 microprocessor performs addition of 87 H and 79 H.
(A) 11, 1, 1, 1    (B) 10, 0, 1, 0
(C) 01, 1, 0, 0    (D) 00, 0, 1, 1
7.       Location transparency allows :
I. Users to treat the data as if it is done at one location.
II. Programmers to treat the data as if it is at one location.
III. Managers to treat the data as if it is at one location.
Which one of the following is correct ?
(A) I, II and III                (B) I and II only
(C) II and III only          (D) II only
8.       Which of the following is correct ?
I. Two phase locking is an optimistic protocol.
II. Two phase locking is pessimistic protocol
III. Time stamping is an optimistic protocol.
IV. Time stamping is pessimistic protocol.
(A) I and III        (B) II and IV
(C) I and IV       (D) II and III