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Sunday, 12 May 2019

NTA UGC NET Computer Science Paper II December 2018 - Part 1

TEST DATE: 20-12-2018
1.       In mathematical logic, which of the following are statements?
(i) There will be snow in January.
(ii) What is the time now?
(iii) Today is Sunday.
(iv) You must study Discrete mathematics
Choose the correct answer from the code given below:
Code:
(1) i and iii
(2) i and ii
(3) ii and iv
(4) iii and iv
Answer: 1
2.       Match the List-I with List-II and choose the correct answer from the code given below:
List I                   List II
(a) Equivalence           (i) pq
(b) Contrapositive        (ii) pq : qp
(c) Converse                 (iii) pq : q⇒∼p
(d) Implication              (iv) pq
Code:
(1) (a)-(i), (b)-(ii), (c)-(iii), (d)-(iv)
(2) (a)-(ii), (b)-(i), (c)-(iii), (d)-(iv)
(3) (a)-(iii), (b)-(iv), (c)-(ii), (d)-(i)
(4) (a)-(iv), (b)-(iii), (c)-(ii), (d)-(i)
Answer: 4
3.       A box contains six red balls and four green balls. Four balls are selected at random from the box. What is the probability that two of the selected balls will be red and two will be green?
(1) 1/14
(2) 3/7
(3) 1/35
(4) 1/9
Answer: 2
4.       A survey has been conducted on methods of commuter travel. Each respondent was asked to check Bus, Train and Automobile as a major method of travelling to work. More than one answer was permitted. The results reported were as follows:

Bus 30 people; Train 35 people; Automobile 100 people; Bus and Train 15 people; Bus and Automobile 15 people; Train and Automobile 20 people; and all the three methods 5 people. How many people completed the survey form?
(1) 120
(2) 165
(3) 160
(4) 115
Answer: 1
5.       Which of the following statements are true?
(i) Every logic network is equivalent to one using just NAND gates or just NOR gates.
(ii) Boolean expressions and logic networks correspond to labelled acyclic diagraphs.
(iii) No two Boolean algebras with n atoms are isomorphic.
(iv) Non-zero elements of finite Boolean algebras are not uniquely expressible as joins of atoms.
Choose the correct answer from the code given below:
Code:
(1) i and iv only
(2) i, ii and iii only
(3) i and ii only
(4) ii, iii, and iv only
Answer: 3
6.       The relation ≤ and > on a boolean algebra are defined as:
x≤y if and only if xy=y
x<y means x≤y but x≠y
x≥y means y≤x and
x>y means y<x
Considering the above definitions, which of the following is not true in the boolean algebra?
(i) If x≤y and y≤z, then x≤z
(ii) If x≤y and y≤x, then x=y
(iii) If x<y and y<z, then x≤y
(iv) If x<y and y<z, then x<y
Choose the correct answer from the code given below:
Code:
(1) (i) and (ii) only
(2) (ii) and (iii) only
(3) (iii) only
(4) (iv) only
Answer: 3
7.       The boolean expression A’B + AB’ + AB is equivalent to
(1) A’B
(2) (A + B)’
(3) AB
(4) A + B
Answer: 4
8.       In PERT/CPM, the merge event represents .............. of two or more events.
(1) completion
(2) beginning
(3) splitting
(4) joining
Answer: 1
9.       Use Dual Simplex Method to solve the following problem:
Maximize z = −2x1 − 3x2
subject to:
x1 + x2 ≥ 2
2x1 + x2 ≤ 10
x1 + x2 ≤ 8
x1, x2 ≥ 0
(1) x1 = 2, x2 = 0, and z = −4
(2) x1 = 2, x2 = 6, and z = −22
(3) x1 = 0, x2 = 2, and z = −6
(4) x1 = 6, x2 = 2, and z = −18
Answer: 1
10.    In computers, subtraction is generally carried out by
(1) 9’s complement
(2) 1’s complement
(3) 10’s complement
(4) 2’s complement
Answer: 4
11.    Consider the following boolean equations:
(i) wx + w(x+y) + x(x+y) = x + wy
(ii) (wx’(y+xz’) + w’x’)y = x’y
What can you say about the above equations?
(1) (i) is true and (ii) is false
(2) (i) is false and (ii) is true
(3) Both (i) and (ii) are true
(4) Both (i) and (ii) are false
Answer: 3
12.    Consider the graph shown below:
Use Kruskal’s algorithm to find the minimum spanning tree of the graph. The weight of this minimum spanning tree is
(1) 17
(2) 14
(3) 16
(4) 13
Answer: 3
13.    Consider the following statements:
(i) Auto increment addressing mode is useful in creating self-relocating code.
(ii) If auto increment addressing mode is included in an instruction set architecture, then an additional ALU is required for effective address calculation.
(iii) In auto incrementing addressing mode, the amount of increment depends on the size of the data item accessed.
Which of the above statements is/are true?
Choose the correct answer from the code given below:
Code:
(1) (i) and (ii) only
(2) (ii) and (iii) only
(3) (iii) only
(4) (ii) only
Answer: 3
14.    A computer uses a memory unit with 256 K words of 32 bits each. A binary instruction code is stored in one word of memory. The instruction has four parts: an indirect bit, an operation code and a register code part to specify one of 64 registers and an address part. How many bits are there in the operation code, the register code part and the address part?
(1) 7,6,18
(2) 6,7,18
(3) 7,7,18
(4) 18,7,7
Answer: 1
15.    Consider the following x86 – assembly language instructions:
MOV AL, 153
NEG AL
The contents of the destination register AL (in 8-bit binary notation), the status of Carry Flag (CF) and Sign Flag (SF) after the execution of above instructions, are
(1) AL = 0110 0110; CF = 0;SF = 0
(2) AL = 0110 0111; CF = 0;SF = 1
(3) AL = 0110 0110; CF = 1;SF = 1
(4) AL = 0110 0111; CF = 1;SF = 0
Answer: 4
16.    The decimal floating point number −40.1 represented using IEEE−754 32-bit representation and written in hexadecimal form is
(1) 0xC2206666
(2) 0xC2206000
(3) 0xC2006666
(4) 0xC2006000
Answer: 1
17.    Find the Boolean expression for the logic circuit shown below:
(1-NAND gate, 2-NOR gate, 3-NOR gate)
(1) AB’
(2) A’B
(3) AB
(4) A’B’
Answer: 3
18.    Consider a disk pack with 32 surfaces, 64 tracks and 512 sectors per pack. 256 bytes of data are stored in a bit serial manner in a sector. The number of bits required to specify a particular sector in the disk is
(1) 18
(2) 19
(3) 20
(4) 22
Answer: 3
19.    Consider a system with 2 level cache. Access times of Level 1 cache, Level 2 cache and main memory are 0.5 ns, 5 ns and 100 ns respectively. The hit rates of Level 1 and Level 2 caches are 0.7 and 0.8 respectively. What is the average access time of the system ignoring the search time within the cache?
(1) 35.20 ns
(1) 7.55 ns
(1) 20.75 ns
(1) 24.35 ns
Answer: 2
20.    If a graph (G) has no loops or parallel edges, and if the number of vertices (n) in the graph is n≥3, then graph G is Hamiltonian if
(i) deg(v) ≥ n/3 for each vertex v
(ii) deg(v) + deg(w) ≥ n whenever v and w are not connected by an edge
(iii) E(G) ≥ 1/3(n−1)(n−2)+2
Choose the correct answer from the code given below:
Code:
(1) (i) and (iii) only
(2) (ii) only
(3) (ii) and (iii) only
(4) (iii) only
Answer: 2

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